Generative Data Intelligence

The Road To Super Chips

Date:

Node: 4356341

Reticle size limitations are forcing chip design teams to look beyond a single SoC or processor in order to achieve orders of magnitude improvements in processing that are required for AI. But moving data between more processing elements adds a whole new set of challenges that need to be addressed at multiple levels. Steve Woo, distinguished inventor and fellow at Rambus, examines the benefits of a common substrate for communication, the impact of pre-processing data in or near memory, and how to mitigate thermal effects in these new super chips.

[embedded content]

Alternative Text

Ed Sperling

  (all posts)

Ed Sperling is the editor in chief of Semiconductor Engineering.

Related articles

spot_img

Recent articles

spot_img